KV58 Note 06 有关DWT

DWT "Chapter 11 Data Watchpoint and Trace Unit"(Cortex—M7参考手册)ARM内核中的数据观察点与跟踪系统

关注

ARM® CoreSight™ Architecture Specification v3.0

"B2.3.10 LSR and LAR, Software Lock Status Register and Software Lock Access Register"

在原来的程序中(sora_dwt.c):

DEMCR |= TRCENA;
DWT_CTRL |= CYCCNTENA;

这种DWT配置方式导致DWT延时程序仅在Debug调试时能够运行,而给单片机重新上电后单片机在DWT延时程序处卡死
其原因是ARM构架中存在一种程序锁,以防止意外的对寄存器的操作,因此在配置DWT寄存器前,必须解锁Lock Access Register,此处也就是DWT_LAR。此外使用DWT延时应当注意DWT_CYCCNT需要初始化为0。

正确代码如下:

DEMCR |= DHCSR_TRCENA;          // enable trace for DWT features
DWT_LAR = DWT_LAR_UNLOCK;       // unlock access to DWT registers
DWT_CYCCNT = 0;                 // reset the cycle count value
DWT_CTRL |= DWT_CTRL_CYCCNTENA; // enable the cycle counter

感谢NXP社区Mark Butcher为我的解答:

DWT_LAR address is 0xe0010fb0 (这里Mark笔误,应为0xe0001fb0)
and the unlock value is 0xc5acce55

This is not easy to find because it is difficult to find in the ARM documents and also some ARM documents declare the wrong address of 0xe0000fb0 too! [But it is correct in the CMSIS M7 header].

To find the details one must first read the "Arm®v7-M Architecture Reference Manual" document
which finally refers to the "ARM ® CoreSight ™ Architecture Specification"
page B2-61